Enabling Efficient Quantized LLM Inference on Floating-Point CGRAs via Lightweight Integer Extensions
* Chenlin Shi and Yanchen Li contributed equally (co-first authors).
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PUBLICATIONS.md
Publications
and presentations.
Research outputs spanning reconfigurable architectures, efficient arithmetic, and advanced CNFET technologies. Each entry identifies its publication format; author order follows the publication record, and my name is highlighted.
01
International conferences
08 entriesTowards Unified Acceleration: Weight-Stationary GEMM on HPC-oriented Elastic CGRAs
MOOPSE: Leveraging High-Radix Booth Encoders for Area-Efficient Matrix Multiply Operations
Enabling Systolic Computing on Elastic Coarse-Grained Reconfigurable Array for HPC and AI
Impact of Reconvergent DFG Paths and Buffer Depth on Elastic CGRA Throughput
Analysis of 64-bit Parallel Prefix Adders and 32-bit Matrix Multiply Units Designed with 7-nm CNFET
Post-Route Power Estimation: a Case Study of RIKEN-CGRA
CNFET7: An Open Source Cell Library for 7-nm CNFET Technology
02
Journal articles
02 entriesA Comprehensive Analysis of the Impact of Sub 10-nm CNFET Technology on 64-bit Parallel Prefix Adders and 32-bit Matrix Multiply Units
CNFET-OCL: Open-source Cell Libraries for Advanced CNFET Technologies
03
Technical reports
02 entriesCNFET7: An Open Source Cell Library for 7-nm CNFET Technology
Evaluation of Microprocessors Placed-and-Routed with CNFET
RECOGNITION
Awards
Best Student Poster Award
SCA/HPC Asia 2026, shared with Lin Teng.
Excellent Student Author Award
IEICE VLD recognition for ASP-DAC 2023.